Fast Locking and High Accurate Current Matching Phase-Locked Loop

SEMI OpenIR > 中国科学院半导体研究所（2009年前）

	Fast Locking and High Accurate Current Matching Phase-Locked Loop
	Liu, SL; Shi, Y; Liu, SL, Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China.
	2008
会议名称	IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008)
会议录名称	2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008)
页码	VOLS 1-4: 1136-1139
会议日期	NOV 30-DEC 03, 2008
会议地点	Macao, PEOPLES R CHINA
出版地	345 E 47TH ST, NEW YORK, NY 10017 USA
出版者	IEEE
ISBN	978-1-4244-2341-5
部门归属	[liu, silin; shi, yin] chinese acad sci, inst semicond, beijing 100083, peoples r china
摘要	In this paper, a charge-pump based phase-locked loop (CPLL) that can achieve fast locking and tiny deviation is proposed and analyzed. A lock-aid circuit is added to achieve fast locking of the CPLL. Besides, a novel differential charge pump which has good current matching characteristics and a PFD with delay cell has been used in this PLL. The proposed PILL circuit is designed based on the 0.35um 2P4M CMOS process with 3.3V/5V supply voltage. HSPICE simulation shows that the lock time of the proposed CPLL can be reduced by over 72% in comparison to the conventional PILL and its charge pump sink and source current mismatch is only 0.008%.
学科领域	微电子学
主办者	IEEE.
收录类别	CPCI-S
语种	英语
文献类型	会议论文
条目标识符	http://ir.semi.ac.cn/handle/172111/8250
专题	中国科学院半导体研究所（2009年前）
通讯作者	Liu, SL, Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China.
推荐引用方式 GB/T 7714	Liu, SL,Shi, Y,Liu, SL, Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China.. Fast Locking and High Accurate Current Matching Phase-Locked Loop[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE,2008:VOLS 1-4: 1136-1139.

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